/dq/media/media_files/2025/08/28/tsmc-2025-08-28-12-54-30.jpg)
Amid scrutiny over Washington’s 10% stake in Intel, TSMC is pressing ahead with its U.S. expansion. MoneyDJ reports that site prep is underway for its two advanced packaging plants (AP1, AP2) in Arizona, with construction set to begin in 2H26 and production by 2028.
The report also details TSMC’s plan for the two advanced packaging plants, adding that AP1 will focus on expanding SoIC (System-on-Integrated-Chips) and CoW (Chip on Wafer) technologies, while AP2 will specialize in CoPoS (Chip-on-Panel-on-Substrate) to meet local demand for AI and HPC chip packaging.
As Commercial Times previously reported, citing sources in the supply chain, TSMC’s U.S. facilities will initially center on SoIC (System-on-Integrated-Chips) and CoW (Chip-on-Wafer), while the back-end oS (on-Substrate) stage will be handled by Amkor.
SoIC clients lining up
MoneyDJ further explains that SoIC represents TSMC’s most advanced packaging technology currently in volume production and will be integrated with CoWoS, and eventually CoPoS. The report adds that beyond AMD, Apple, NVIDIA, and Broadcom are also expected to adopt SoIC for their high-end products.
Commercial Times suggests that SoIC will likely be adopted in Apple’s next-generation M-series chips. The report also cites sources expecting AMD’s next-generation EPYC processor, Venice, to use TSMC’s 2nm process paired with SoIC packaging.
Meanwhile, NVIDIA’s upcoming Rubin platform, set to debut next year, will also adopt SoIC technology. According to the report, Rubin’s GPU and I/O dies will be manufactured separately—with GPUs produced on N3P and I/O on N5B—then integrated through SoIC to combine two GPUs with one I/O die.
Source: TrendForce, Taiwan.