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IBM has officially released the first generation of its Nighthawk quantum processor. The processor was unveiled at the annual Quantum Developer Conference, the Nighthawk processor is designed to bridge the gap between experimental utility and practical quantum advantage, the point where a quantum computer solves a problem more effectively than any classical system.
The square lattice arhitecture
Nighthawk features 120 superconducting qubits arranged in a square lattice. This design differs from the "heavy-hex" geometru found in previous models like Eagle and Heron. The new layout incorporates 218 next-generation tunable couplers, providing each qubit with connectivity to its four nearest neighbours.
This 20% increase in connectivity compared to the Heron processor allows the system to execute circuits with 30% more complexity. By reducing the need for "SWAP" gates, operations that move information between distant qubits, the Nighthawk architecture maintains lower error rates while handling deeper workloads.
Comparison of IBM Quantum processors
IBM's hardware strategy has shifted from increasing raw quibit counts to maximising the quality and connectivity of this qubits.
| Feature | Eagle (2021) | Heron r3 (2024/25) | Nighthawk (2025/26) |
| Qubit Count | 127 | 156 | 120 |
| Topology | Heavy-Hex | Heavy-Hex | Square Lattice |
| Connectivity | 2 or 3 neighbors | 2 or 3 neighbors | 4 neighbors |
| Coupler Count | ~140 | 176 (Tunable) | 218 (Tunable) |
| Gate Capacity | ~2,880 gates | 5,000 gates | 5,000+ gates |
| Median Coherence | ~100 µs | ~200 µs | 350 µs |
| Circuit Complexity | Baseline | High | 30% higher than Heron |
Performance and roadmap
The first iteration of Nighthawk, known internally as IBM_Miami, is now available to users on Premium and Flex plans. Performance data indicates a median coherence time (T1) of approximately 350 microseconds, the highest currentlt recorded in IBM's fleet. Longer coherence times allow qubits to remain in a quantum state for more operations before noise disrupts the calculation.
Currently, the system can execute 5,000 two-qubit gates in a single circuit. IBM expects to reach 7,500 gates by late 2026 and 10,000 gates by 2027. By 2028, the company aims to support 15,000 gates on systems with over 1,000 qubits using long-range couplers.
In terms to support this hardware rollout, IBM has shifted its primary fabrication to a 300mm wafer facility at the Albany Nanotech Complex. This transition fro smaller research-scal wafers to industrial-standard 300mm silicon technology has doubled the speed of research and development. This industrial approach allows IBM to research multiple chip designs in parallel and has led to a ten-fold increase in the physical complexity of the chips.
The path to error correction
While Nighthawk focuses on near-term advantage, IBM also introduced Quantum Loon, an experimental processor. While Nighthawk is built for performance today, Loon serves as a testbed for fault-tolerant computing. Using Loon, researchers demonstrated real-time decoding of quantum errors in under480 nanoseconds. This speed is necessary for correcting errors as they occur during a calculation, a requirement for the fault-tolerant systems IBM plans to deliver by 2029.
Verification and community tracking
IBM is collaborating with the Flatiron Institute, Algorithmiq, and BlueQubit to launch a Quantum Advantage Tracker. This open, community-led tool allows researchers to verify quantum results against the best available classical methods. The goal is to move past theoretical claims and provide a transparent record of when quantum systems outperform classical supercomputers in terms of accuracy, cost, or speed.