IBM launches Nighthawk, accelerates path to fault-tolerant quantum computing

IBM announced major advances in hardware, software, and fabrication at its annual Quantum Developer Conference, defining clear steps toward its goal of delivering quantum advantage by the end of 2026 and a fault-tolerant quantum computer by 2029. The company introduced two new processors, made strides in software performance, and detailed a strategic shift in manufacturing designed to quicken its entire quantum roadmap.

Defining quantum advantage with Nighthawk

IBM unveiled its newest processor, IBM Quantum Nighthawk, built to complement quantum software and reach the milestone of quantum advantage. The Nighthawk chip features 120 qubits linked by 218 tunable couplers. This structure provides over 20 percent more couplers than the previous IBM Quantum Heron.

The improved architecture allows users to execute circuits with 30 percent greater complexity than was possible on IBM’s earlier processors while maintaining high fidelity. The Nighthawk system allows researchers to explore computationally challenging problems requiring up to 5,000 two-qubit gates. IBM plans to scale this capacity, projecting future Nighthawk iterations will handle up to 7,500 gates by the end of 2026, and up to 15,000 gates by 2028, enabled by extending connectivity to 1,000 or more qubits.

As part of validating its goal, IBM established an open, community-led quantum advantage tracker with partners Algorithmiq, the Flatiron Institute, and BlueQubit. This tracker currently supports three experiments across observable estimation and variational problems, establishing a systematic method to monitor and confirm advantage claims against the best classical methods available.

Software refinement lowers computational cost

The usability and economics of quantum computing depend heavily on software. IBM's Qiskit software stack received crucial updates that address cost and accuracy. By scaling dynamic circuit capabilities, the company achieved a 24 percent increase in accuracy for circuits with over 100 qubits.

More critically for business use, IBM introduced a new Qiskit execution model with a C-API. This allows for High-Performance Computing (HPC) accelerated error mitigation, reducing the cost of extracting accurate results by more than 100 times. This advancement directly cuts the operational expense of quantum calculation. To welcome the HPC community, IBM also released a C++ interface for Qiskit, enabling users to program quantum systems natively within existing high-performance computing setups.

Loon system builds fault tolerance foundation

In parallel with its advantage path, IBM announced key progress toward its 2029 fault-tolerant goal. The company introduced IBM Quantum Loon, an experimental processor that demonstrates all hardware elements required for fault-tolerant quantum computation. The Loon system will validate a new architecture necessary to implement and scale components for high-speed quantum error correction. This validation includes the use of multiple routing layers to create "c-couplers," which physically link distant qubits on the same chip, extending connectivity beyond nearest neighbors.

On the algorithmic side, IBM achieved a critical engineering feat a full year ahead of schedule. The company proved that classical computing hardware can accurately decode errors in real-time, in under 480 nanoseconds, using Quantum Low-Density Parity Check (qLDPC) codes. This capability provides a 10 times speedup over previous approaches, establishing a core technological foundation needed to scale qLDPC codes on high-fidelity superconducting qubits.

Manufacturing shift doubles R&D speed

A significant business and operational move accompanies the hardware announcements. IBM is shifting the primary fabrication of its quantum processors to an advanced 300mm wafer fabrication facility at NY Creates' Albany NanoTech Complex.

This move from smaller wafers to the 300mm industry standard leverages state-of-the-art semiconductor tooling, enabling 24/7 operations. The transition carries several material benefits:

• Speed: The time required to build a new processor is cut by at least half, doubling the speed of research and development efforts.

• Scale: The physical complexity of the quantum chips increases by a factor of ten, a vital step for the fault-tolerant error correction roadmap.

• Parallelism: The facility allows IBM to research and explore multiple chip designs concurrently.

This move positions IBM to scale manufacturing volume and accelerate the iterative development cycle necessary to meet its aggressive 2029 goal.