In the field programmable gate-array (FPGA) market marathon, very few
sprinters reach the finishing line. And if quick time to market and the fast
enough responses to market changes are key programmable logic values, system-on-a-programmable-chip
(SOPC) solution provider Altera will claim a place
ahead of archrival Xilinx.
SOPCs comprise an embedded processor connected to a number of peripherals
through an on-chip bus. All of the components-including the processor,
peripherals, and the bus-are realized on a single FPGA chip.
Altera says its distinguishing factor is the fact that it offers HardCopy, a
structural ASIC, something that becomes 'most compelling' because of its
product development flexibility and time-to-market benefits. The company claims
it has a unique FPGA front-end design flow for using Altera's Stratix series
of high-density, high-performance FPGAs to develop, verify, and finalize system
design before committing them to silicon.
At the company's annual show-SOPC World-held in Bangalore on November
3, 2005, Danny Biran, VP, Product and Corporate Marketing explained the nuances:
"If you look from the perspective of customers, they always like to use
FPGAs for prototyping. But they would typically switch to an ASIC if they wanted
to go for high volume. Now that we offer HardCopy, and as part of that we offer
seamless and risk-free migration from Stratix FPGA to HardCopy, we can stay with
the design for a much longer time."
Expecting more innovation in the development process, and in development
tools that support the process, are obvious outcomes, Biran says.
What Makes It Hot
As FPGAs became bigger and more complex, compilation of the design started
to become a bottleneck. The new Quartus version is the first in the industry to
introduce a capability called incremental compilation, to help designers segment
designs into physical and logical partitions for synthesis and fitting.
"That saves a lot of time," says the spokesperson. When he spoke to
customers about transceivers, they talked about signal integrity and power
consumption issues. "The two main benefits of Stratix II GX are that it has
superior signal integrity and very low power consumption. Signal integrity is
all about productivity because when you design a system with high-speed
transceivers, the most challenging task is to design the board in the system
without having signal integrity issues. he adds.
Business wise, growth for Altera will come from communications and the
automotive sector. Automotive applications that typically lend themselves to
programmable logic are: infotainment, consumer applications like DVDs, displays,
and audio and video. "These systems have much faster design time and design
cycles," says Biran. Penetration of programmable logic into the consumer
segment started late for the company. But now that it has taken off, hopes of
growth are running faster than design cycles.
Harvesting Talent
Altera cultivates SOPC talents mainly in Asia, through its
university programs. Altera has already engaged about six of the top 10 colleges
it identified, investing an equivalent value of about a million dollars in the
form of software and development boards and kits. As part of this, it has also
trained the professors.
An interesting aspect of its program is the NIOS, soft-core
embedded processor design contest, where students make complex designs on the
FPGA. This year, 40 designs were submitted from India and the first award went
to G Ananth, US Karthikeyan, and Prof V Kamakoti of IIT Madras for 'Cryptographic
Algorithm using Multi-Board FPGA Architecture.'
Designs received this year covered a range of applications such
as telecommunications, wireless, consumer, security, automotive, DSP,
industrial, medical, and biometrics.
Some of the other designs submitted in the contest were:
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Industrial process control
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JPEG 2000 implementation
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Biomedical signal monitoring system
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MP3 player
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Speech recognition system
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Security system using IRIS
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Spectral estimation
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Wavelet-based image compression
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Adaptive cruise control for automobiles
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OFDM modulator
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Smart home networking
The designs evaluated on factors like design complexity, functionality, and
completeness.
Goutam Das in Bangalore