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With big techs led by NVIDIA betting on TSMC’s CoWoS, the foundry giant is moving ahead with its CoPoS, or, chip-on-panel-on-substrate technology, amid strong AI demand. According to MoneyDJ and the Economic Daily News, TSMC’s first CoPoS pilot line is set for 2026, with mass production targeted by 2029.
MoneyDJ highlights NVIDIA as the likely first big customer for TSMC’s CoPoS, while Economic Daily News points out that CoPoS—built for high-end applications like AI—extends CoWoS-R for Broadcom and CoWoS-L for NVIDIA and AMD.
According to the reports, TSMC’s CoPoS is essentially a square-panel evolution of CoWoS-L and CoWoS-R, swapping the traditional round wafer for a rectangular substrate. Measuring 310x310mm, the rectangular design reportedly offers more usable substrate space than traditional round wafers, boosting output efficiency and cutting costs.
MoneyDJ reveals TSMC’s AP7 site in Chiayi is shaping up as a key hub for next-gen advanced packaging. The campus, planned in eight phases, will start large-scale CoPoS production in phase 4, the report adds.
Per MoneyDJ, the first phase (P1) of AP7 will serve as a dedicated WMCM (multi-chip module) base for Apple, while phases 2 and 3 focus on ramping up SoIC production. Notably, CoWoS production is not planned for AP7 and remains at AP8, a site repurposed from an old Innolux facility, the report suggests.
-- Source: TrendForce, Taiwan.