Keys for paralleling SiC MOSFETs

Based on several high-power applications, we can see a clear trend of using power modules and discrete MOSFETs. There is a significant overlap between both, roughly from 10 kW to 50 kW. Modules fit well for this power range, but discrete MOSFETs bring other benefits: design freedom and a much wider portfolio. When a single MOSFET is not enough for the power, parallelization is the solution.

However, power is not the only reason to use MOSFETs in parallel. As revealed in the article, the switching energies could be lower, and heat transfer much better. Together with the thermal effect on conductive losses, parallelization is a great tool for lower losses, better cooling, and/or increased power capability. 

However, not all devices are suitable for usage in parallel, especially as various parameters and their spread affect the behavior. This article digs into this problem and shows how ST's SiC MOSFETs (Gen3) fit well into paralleling.

Discrete MOSFETs and power modules
In discrete components, there is only one device per package, such as one MOSFET or diode. The packages can vary, including through-hole (THT) or surface mount (SMD). There is no limit in design when it comes to topology or using different packages in one design.

Power modules are the exact opposite: the devices inside are arranged into a specific topology, such as a full bridge. Once the module is made, there is no possibility to modify the topology or any parameters of the devices. Therefore, instead of testing different discrete parts during the prototyping stage, with modules, much more effort is put into simulations.

There are two major benefits of power modules:
Power dissipation: The cross-section of the module consists of a cooling backplate, ceramic electrical isolator, and copper planar traces onto which silicon or silicon carbide chips of the separate devices (e.g., MOSFETs) are directly sintered. This configuration is optimal for cooling: the backplate is connected directly to the heatsink, requiring no further electrical insulation. The only entity between the heatsink and the backplate is thermal interface material (TIM), such as thermal paste.

Reduction of commutation loop: The second benefit of using modules is the reduction of the commutation loop. This is more complex than cooling, but the effect is significant. In other words, reduces parasitic parameters. Each trace has its resistance and inductance; the longer the trace, the worse both become. 

Resistance creates conductive losses according to the RMS current through the trace, which in this power range is not negligible. Inductance reacts to the change in current, creating voltage overshoots. The faster the transient, the higher the voltage spike, which could be destructive for the device.

Discrete components can never be as good as modules in these aspects:
• Cooling: The cooling plate of the package is generally not isolated and is usually connected to the drain in MOSFETs. Therefore, the TIM must ensure not just proper thermal transfer, but also electrical insulation.

• Trace Length: The length of the trace from chip to chip is longer in discrete components. The current flows through bonding wires to the leads of the package, then to the PCB, and back again.

In modules, paralleling devices is straightforward: two chips are sintered next to each other, with the rest of the nodes connected by short bonding wires. The thermal coupling between the chips is excellent.

In discrete components, the thermal coupling is not as great. Heat dissipates from the chip to the package, then through the TIM to the heatsink, and then back to the other MOSFET. Each medium and each transition between them introduces thermal resistance, causing a temperature drop with heat flow.

Motivation for paralleling discrete MOSFETs
Let's not reject discrete MOSFETs in parallel quite yet. As stated in the abstract, there are several benefits: a lot more design freedom, huge granularity, second sourcing, and easier prototyping. Further benefits are hidden in the basic facts of parallel combination:

The thermal resistance is proportional to the cooling area of the package. If the package is the same and we split the losses between two identical devices, we have twice the overall cooling area or half the power dissipation per package. This means half the drop in thermal resistance junction-to-heatsink, making the actual temperature of the MOSFETs closer to the heatsink temperature.

In MOSFETs, dissipated power has two main portions: conductive losses and switching losses. Conductive losses are caused by current flowing through the channel, which has its on-state resistance (RDSon). This creates a voltage drop and multiplying this by the current gives power losses. In a parallel combination of N identical MOSFETs, the overall on-state resistance is N-times lower.

Switching losses originate from the overlapping of voltage and current during ON and OFF switching. Despite this transient being quick, with high voltage and current, the peak power is significant. Integrating power over time (area under the trace) gives us energy: turn-on and turn-off energies for given conditions. Multiplying these by switching frequency (or adding all of them during one second if conditions vary) gives the switching losses.

The given conditions are notable as these energies deeply depend on several aspects: time of the transient, voltage, current, and temperature. For paralleling, there is a hidden benefit in the current function of these energies.

The trace of the energies is not linear, with a slight exponential trend. Therefore, twice the current results in more than twice the energy. For paralleling, the approach is opposite: if we split the current between two identical devices, the overall switching energies would be lower than if switched through just one device.

If we compare one MOSFET in a power module versus two of them in discrete form, the module would be at a disadvantage:

• Cooling path: While the cooling path is hard to compare due to the different structure of the module, the larger area of discretes would compensate for all negatives and potentially even surpass the module.

• Conductive and switching losses: Two times lower conductive losses and reduced switching energies are significant advantages for discrete MOSFETs in parallel.

This explains the overlap of discretes in parallel and modules in the mentioned power range. Using more of the same device increases the power, and selecting higher RDSon (therefore cheaper) in parallel could still compete with a module at the same power.

Thermal runaway – hidden threat in the advantage
The on-state resistance (RDSon) of a MOSFET is more than just a static value; it depends on the current and, even more significantly, on the temperature. In the considered power range, the recent trend is almost exclusively using silicon carbide (SiC) MOSFETs, which have lower temperature variation compared to silicon ones.

An example of such behavior representing the SCT011HU75G3AG, ST's latest Gen3 SiC MOSFET in the state-of-the-art Top-Side Cooled package HU3PAK. As it has the lowest RDSon, it is a good choice for paralleling.

However, the on-state resistance rises roughly 50% from 25°C to the maximum of 175°C. Compared to standard silicon MOSFETs, this is significantly lower. Silicon MOSFETs can experience a rise around 200%, and this is at 150°C (not 175°C) as this was the absolute maximum rating.

Having a flat RDSon curve is ideal for design because conductive losses are more stable with temperature. However, with rising losses, there is a risk of thermal runaway: more losses generate more heat, increasing the temperature further. This positive feedback was a problem with silicon MOSFETs, but with silicon carbide (SiC) it’s usually negligible—unless MOSFETs are in parallel.

Why is there such a difference? The answer lies in the parameter spread, specifically RDSon. According to the datasheet, the SCT011HU75G3AG should have 11.4 mΩ but could be up to 15 mΩ. Although it's unlikely such a widespread would appear in one batch, let's consider it. 

The 15 mΩ is 32% higher than the 11.4 mΩ, meaning it would take that much less current as they share the same voltage. Therefore, the 11.4 mΩ MOSFET would have roughly 32% higher losses and heat up more. If the rise of RDSon with temperature were higher, it would mean higher losses, but the hotter MOSFET would compensate itself and let the cooler one take more losses.

Real application analysis
How critical is this in a real application? MOSFETs share the same heatsink, so they are thermally coupled, but this is a serious threat. To answer this, I investigated it deeply in simulation. 

Considering two MOSFETs, SCT011xx75 in HU3PAK (the situation for TO247 would be better, so considering a tougher case), one with 11.4 mΩ and the other with 15 mΩ. The heatsink temperature is 90°C, with thermal interface material (TIM) mostly being gap-filler, thermal conductivity selected at 7 W/(m∙K), and thickness 0.4 mm. Focusing on the conductive losses, the total RMS current is 140 A. The cooling area of HU3PAK is 120 mm², giving us Rth case-to-heatsink with selected TIM 0.476 K/W.

Simulation results
• The 15 mΩ MOSFET takes 63 A out of the 140 A, with a case temperature of 123.7°C and a junction temperature of 139.9°C.
• The 11.4 mΩ MOSFET takes 77 A, with a case temperature of 131.8°C and a junction temperature of 151.8°C.

The current mismatch is now 22% compared to 32% initially, and both MOSFETs have enough margin to the absolute maximum temperature. The significant factor is the thermal gradient on the TIM: there’s an astonishing drop of 33.7°C from case to heatsink for the 15 mΩ MOSFET and 41.8°C for the other. 

The real limit in this case is the TIM, not the imbalance between MOSFETs. The thermal conductivity was chosen as 7 W/(m∙K), which is good but not the best. Fortunately, recent demand for such materials has pushed research forward, and there are now electrically isolated gap-fillers above 20 W/(m∙K).

Conclusion
Power modules are great for high-power applications, but discrete MOSFETs offer many benefits, making them viable for the same power range as modules. What is the key to choosing the right ones? Good switching and thermal handling.

Fortunately, ST's Gen3 SiC MOSFETs are well-suited for this purpose. Besides proper switching even in parallel, the thermal variation of RDSon offers the best trade-off between keeping losses as low as possible and preventing thermal runaway in case of any imbalance.

-- David Kudelasek, Application Engineer, STMicroelectronics–Power & Energy Application Lab (Prague), STMicroelectronics.