HBM has broken the memory cycle: Why this shortage Is different?

In a recent Market Pulse article,“Is Micron in a Bubble?”, I examined whether the sharp rise in Micron’s earnings and share price reflects another familiar memory-cycle peak or something more durable. That analysis focused on valuation risk and investor behavior. This Semiconductor Deep Dive addresses a different question: whether the underlying structure of the memory market itself has changed.

High-bandwidth memory (HBM) suggests that it has
For decades, the memory industry followed a predictable rhythm. Periods of undersupply and rising prices triggered aggressive capacity expansion, which eventually led to oversupply, collapsing margins, and multi-year downturns. Investors learned to treat strong memory pricing as a warning signal rather than a foundation for sustained profitability.

HBM has disrupted that rhythm. The current shortage is not the result of a temporary demand spike or a delayed capital response. It reflects a structural reallocation of wafer capacity, cleanroom space, and advanced packaging resources toward a class of memory products that behave fundamentally differently from conventional DRAM. As a result, the mechanisms that historically restored balance in the memory market are no longer operating in the same way.

Why HBM does not behave like conventional DRAM?
Traditional DRAM scales linearly. Additional wafers produce additional bits, and incremental fab investment eventually restores equilibrium. HBM does not scale in this fashion.

HBM production requires through-silicon vias, multi-die stacking, advanced bonding, and close integration with logic devices. These steps consume disproportionate amounts of cleanroom capacity and process time relative to the number of bits produced. Each incremental increase in HBM output therefore displaces a much larger volume of conventional DRAM production.

This structural inefficiency is not a transient bottleneck. It is inherent to the product. As long as AI systems demand higher memory bandwidth through stacked architectures, the supply response will remain constrained.

-- Dr. Robert Castellano's Semiconductor Deep Dive, USA.