Delloite presents 2026 global semiconductor industry outlook

While chip sales continue to soar in 2026, the industry focus may shift to risk mitigation for demand correction, integrated system architecture, and a balanced investment approach

The semiconductor industry is navigating a high-stakes paradox in 2026. While soaring artificial intelligence-driven demand is pushing revenues to unprecedented levels, this boom has its risks. The industry seems to have placed all its eggs in the AI basket, which may be fine if the AI boom continues. But, the industry should also consider planning for scenarios in which AI demand slows or shrinks.

State of the market today
The global semiconductor industry is expected to reach US$975 billion in annual sales in 2026, a historic peak fueled by an intensifying AI infrastructure boom. Growth reached 22% in 2025 and is projected to accelerate to 26% in 2026, and even if growth moderates thereafter, annual sales of US$2 trillion seem likely by 2036. 

However, this record growth masks a stark structural divergence. While high-value AI chips now drive roughly half of total revenue, they represent less than 0.2% of total unit volume. Another divergence is that, as AI chips are booming, chips for automotive, computers, smartphones, and non–data center communications applications are seeing relatively slower growth.

The stock market is often a leading indicator of industry performance. As of mid-December 2025, the combined market capitalization of the top 10 global chip companies was US$9.5 trillion, up 46% from US$6.5 trillion in mid-December 2024 and 181% from US$3.4 trillion in mid-December 2023. Further, the market cap is highly concentrated, with the top three chip stocks accounting for 80% of that total.

At the time of publication, Deloitte predicts that GenAI chips will approach US$500 billion in revenue in 2026, or roughly half of global chip sales. Further, AMD CEO Lisa Su has raised her estimate for the total addressable market of AI accelerator chips for data centers to US$1 trillion by 2030.

In 2025, an estimated 1.05 trillion chips were sold at an average selling price of US$0.74 per chip. At a rough estimate, although gen AI chips are likely to account for about 50% of industry revenues in 2026, they are less than 20 million chips, or roughly 0.2% of total volume. Even though global chip revenues in 2025 are expected to rise 22%, silicon-wafer shipments increased by only an estimated 5.4% for the year.

In terms of key end markets, personal computing device and smartphone sales, which were anticipated to grow in 2025, are now expected to decline in 2026 due to rising memory prices.

Revenues for memory in 2026 are likely to be about US$200 billion, or 25% of total semiconductor revenues for the year. Memory is notoriously cyclical, and makers appear cautious about overbuilding. As a result, they are increasing capital expenditures only modestly, with much of that going to research and development for new products rather than massively ramping capacity.

Therefore, the growth in demand for HBM3 (High Bandwidth Memory 3), HBM4, and DDR7 memory for AI inference and training solutions has caused shortages of consumer memory, such as DDR4 and DDR5; prices for these products were up about 4x between September and November 2025.

Predicting memory supply, demand, and pricing is hard, but some suggest that the current tightness in consumer memory could last a decade. Further price increases are likely in quarters one and two of 2026, perhaps as much as another 50%, with, for example, one popular memory configuration reaching US$700 by March 2026, up from US$250 in October 2025.

This concentration of value appears to have contributed to a shift in market dynamics. As manufacturers prioritize the specialized hardware required for AI training and inference, the resulting “zero-sum” competition for wafer and packaging capacity is already disrupting downstream sectors.

For leadership, the 2026 mandate moves beyond simply capturing AI demand to managing the systemic risks of a high-margin, low-volume paradigm, where severe shortages in essential components such as memory are projected to drive 50% price spikes by mid-year and redraw the global supply chain map.

Capitalizing on AI data center boom in 2026 … with caution
The chip market is heavily exposed to AI chips for data centers, with up to roughly half of industry revenues expected to come from that market in 2026. But, what might prevent that from happening? And, what could that mean for the semiconductor industry, especially if non–data center markets such as the PC, smartphone, and automotive sectors remain weak?

First, those expectations are unlikely to change in 2026. The chips have already been ordered and are in backlog, data centers are under construction, and the numbers for the next 12 months are likely solid. But, 2027 and 2028 could diverge sharply from current expectations for reasons noted below:

Return on investment: Most organizations building data centers don’t expect to recoup all their money in the first year. But, over five- to 15-year periods, there should be reliable revenue flows whose present value generates some level of return for investors. If monetization of AI looks like it may take longer or be lower than expected, data center projects could be canceled or postponed, with an adverse impact on chip sales.

Power: AI data centers are expected to need 92 gigawatts of additional electric power by 2027. That power may not be available from the grid, and while some “behind-the-meter” gas generation was feasible in 2025, turbines are sold out going forward, making future gas generation increasingly challenging. Securing data center permits may get difficult due to the risk of rising electricity rates for consumers.

Innovation: Every generation of chips becomes substantially more efficient, likely making the incumbent installed base more of a liability than an asset. AI models used for training and inference appear, over time, to become more efficient and need less computational demand (or “compute,” to industry insiders) for the same tasks. These trends may already be baked into data center capex plans, but an orders-of-magnitude breakthrough in either could mean the need for fewer or cheaper chips.

Pricing: AI chips are currently expensive and command high margins. If new competitive chips are introduced at lower prices, this could have a deflationary effect on the overall chip market, especially pricing.

Chip industry effects
What could some or all of the above mean for the chip industry over the next one to three years?

Money and market impact: Chip designers and manufacturers that currently benefit from AI tailwinds could face headwinds. Revenue growth could decrease or turn negative. Earnings could be lower. Price-to-earnings and price-to-sales multiples could fall, and market caps could decline.

Fabs, tools, design tools, and more: Since AI chips are high in value but low in volume, a decline in revenues would likely have relatively little impact on companies that manufacture chips or the tools used to make them. Even if AI-chip volumes fall, because AI chips make up a small part of manufacturing capacity, it likely wouldn’t mean that fabs go idle. That said, companies producing certain types of packaging, memory, power, and communications semiconductors could be affected.

Strategic questions to consider
If the AI chip demand slows in 2026 or beyond, how can chip companies effectively adapt, while maintaining high cash levels and low debt alongside their capital spending commitments?

Computing chips, memory solutions, and packaging products used in AI data centers are fairly special-purpose in nature. Should data center demand experience a fall or correction, what other end-market opportunities are available for AI chipmakers to pivot toward?

Where and how can advanced memory and advanced logic manufacturing capacity be redirected if AI chip demand starts to correct in 2026?

System-level performance
That leads to the race for system-level performance: Compute, memory, and network connectivity

With AI data center workloads forecast to triple or quadruple annually between 2026 and 2030, chip- and system-level integration will be required to enable system performance in hyperscale data centers. As Deloitte has predicted, chiplets are addressing chip-level performance needs in AI data centers, delivering yield, bandwidth, and energy-efficiency benefits.

Chip manufacturers in 2026 are likely to increasingly integrate HBM closer to logic chiplets, either on silicon interposers or in 3D stacks, allowing data to move much faster between processors—graphics processing units (GPUs) and neural processing units (NPUs)—and memory (HBM stacks), at multiple terabytes per second, while being more energy efficient (lower joules per bit and lower watts per token).

Additionally, co-packaged optics (CPO) will likely gain traction in data center switches, enabling higher aggregate bandwidth per rack with a lower Ethernet/InfiniBand switch footprint. High-bandwidth flash, which can support faster scale-up (within a server rack) and scale-out (across multiple racks and systems), will likely experience more demand in 2026, especially as AI workloads shift from training to inference.

However, as traditional copper Ethernet network designs are unable to meet AI workloads, which generate massive east-west traffic between GPUs, optical interconnects (both CPO and linear pluggable optics, or LPO) are likely to see greater adoption in 2026.

 AI network fabric spending is expected to grow at a CAGR of 38% between 2024 and 2029. As AI data center networks scale to 51.2 terabits per second and above switching capacities—within and across racks and clusters—it’s not only critical to integrate the various components (memory stacks, compute systems, and rack-scale networks) but also to re-assess the use of copper or traditional pluggables, which could adversely impact power consumption and bandwidth or take up too much space.

This is where CPO and LPO can address those gaps in 2026, as they help shorten electrical paths, reduce power consumption by 30% to 50%, and offer higher bandwidth and better total cost of ownership.

Some hyperscalers are using advanced network chips from merchant silicon vendors and disaggregated hardware models in order to develop their own custom topologies on top of those solutions. However, in 2026, the industry could increasingly pivot to software-defined network fabrics that integrate compute and networking into a single, vertically integrated solution, given the benefits of superior performance, better orchestration, and lower TCO.

Even as cloud hyperscalers, AI network companies, foundries, and outsourced semiconductor assembly and test (OSAT) facilities race to address complex heterogeneous system integration challenges, they need to contend with the difficulties involved in next-generation back-end assembly and test processes.

For instance, every chip product needs to pass through specific process steps such as molding, singulation, thermal management, and bumping. These steps require specialized packaging expertise and statistical process control skills that are scarce in the United States and Europe. As a result, talent constraints in advanced packaging may continue to hinder regional goals of achieving greater semiconductor autonomy, even as volume-based back-end capacity expands further in Asia.

Strategic questions to consider
Could sourcing and procurement be disrupted by materials constraints (supply and availability of substrates, memory, and interconnects); geopolitics (assembly and test capacities and suppliers in vulnerable regions); and the talent pipeline for test and packaging engineers?

As foundries and integrated device manufacturers (IDMs) deploy advanced technologies like chip-on-wafer-on-substrate and hybrid bonding to bring HBM closer to compute, could traditional OSAT models get commoditized?

To what extent should there be investments in next-generation interconnects such as CPO, LPO, photonics, and chiplet-based networking, and where and how can AI be applied to accelerate design cycles for these complex heterogeneous systems?

Creative AI investments
We will see the rise of creative AI investments and deals that enable vertical integration.

Strategic alliances among the broader AI, semiconductor, and cloud infrastructure providers have heralded a new AI computing capital cycle. Investments made in 2025 will likely continue or accelerate in 2026, creating a funding and demand ecosystem, where capital and computing resources flow back and forth among companies mainly involved in AI model development, AI accelerator design, production, packaging, and data center infrastructure.

For instance, an investing company (typically a chip hardware, platform, or cloud infrastructure provider) may invest billions of dollars in an AI startup to accelerate the development of solutions. In return, the AI startup would rapidly incubate and accelerate new product development and, in turn, buy the investing company’s computing resources and infrastructure offerings. These moves have become a way for chip companies to achieve vertical integration across the AI data center stack.

Besides AI training and inference workloads, another factor driving the surge in the semiconductor industry’s investment activity is the geopolitical imperative, even as governments and businesses want to influence regional technology infrastructure. Many governments consider AI models, chip design intellectual property, and leading AI accelerators to be critical to national security, supply chain resilience, and tech sovereignty.

Increasingly, governments are seeking to secure these capabilities through export control measures to help bolster local and regional availability of leading-edge AI chip manufacturing capabilities, so that homegrown chipmakers can expand their market presence. Concurrently, they’re seeking to find a balance between limiting the export of strategic AI and technology products by allowing some of the advanced chips to be exported.

For example, the US government in Dec. 2025 approved NVIDIA to sell its H200 AI chips to a set of approved customers in China, in return for a 25% share in NVIDIA’s chip sales. In the midst of these developments, Europe appears caught between US export controls (restricting advanced chip sales to China) and China’s countermeasures.

As tech and chip majors continue to pursue this new form of vertical integration (referred to as circular financing by some industry analysts), the semiconductor industry’s capital allocation strategies may need to shift from capacity- to capability-driven models, with an emphasis on achieving AI system-level differentiation.

In 2026 and beyond, chip companies should not only consider expanding the breadth and scope of their operations by establishing more AI fabs or developing new AI chip platforms, but also foster strategic partnerships and make direct investments to build an ecosystem around their fab or chip platforms.

Traditional volume-based foundries may want to integrate advanced packaging capabilities. OSATs could codesign chiplets with integrated device manufacturers and design players, while electronic design automation companies and foundries could benefit from collaborating closely with wafer-fab front-end equipment providers.

As chip industry executives look for ways to deploy their cash strategically, they should consider assessing talent needs and skill availability, core competencies, and partner models that are more region- or country-specific. This assessment should also include non-AI market opportunities by focusing on mature chip nodes to address automotive and electric vehicle, aerospace and defense, manufacturing, and power infrastructure markets—many of which could be specific to the countries in which they operate.

Strategic questions
With billions of dollars already flowing into AI computing and data center infrastructure capacity expansion, how can capital be deployed not only to build more capacity but also toward scaling power generation (including carbon-free sources) to support that expansion?

When deploying capital, have organizations evaluated various factors, including geopolitical trade-related risks and policy shifts such as import duties, export controls, and localization moves; supply chain concentration risks such as substrates, chemicals and gases, and other materials and components; supplier and partner models such as multi-foundry or multi-cloud vendor partnerships; and talent availability?

How to balance investments between leading-edge logic and memory manufacturing and packaging and the continued need for trailing-node fabrication, equipment, and assembly and test?

Signposts for the future
For 2026, semiconductor industry executives should be mindful of the following signposts:

Current leaders in AI GPUs, CPUs, and memory may find it challenging to maintain their dominant market share in the face of new entrants and the shift from AI training to inference. One view is that a growing pie is big enough for everyone, while others will be looking for signs that it’s more of a zero-sum game.

DRAM capex is expected to rise 14% and NAND flash capex by 5% to US$61 billion and US$21 billion, respectively. Given the end-of-year surge in prices, those numbers could spike higher, meeting near-term demand, but possibly building overcapacity in the industry, yet again.

Increasing volume and value of deals that involve complex revenue-sharing agreements or compute-for-equity swaps could exert pressure on future profitability and ROI for AI model developers and data center infrastructure players, as tech debt mounts further.

As North America, Europe, the Middle East, and Japan intend to ramp up their own domestic chip production capabilities, foreign direct investment into the rest of Asia may be affected.

As a corollary, regions may diverge more: For instance, Southeast Asia and India will likely emerge as volume-based back-end assembly and test hubs, specializing in select areas of the back-end processes. While Taiwan, the United States, Japan, and parts of Europe may focus on heterogeneous integration and advanced packaging, though, at varying levels of specialization.

As the overall AI data center buildouts continue to expand, it may further constrain electric power grids. Therefore, cloud and semiconductor companies that will likely stand to benefit will be those that proactively invested in or factored power generation capacity and availability, while those that didn’t consider power as part of the overall equation could experience execution challenges.

-- Source: Delloite, USA.