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Driving Technology

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DQI Bureau
New Update

The speed of the microprocessor and Intel’s Pat Gelsinger’s career growth

have been running on parallel tracks for the last 20 years. At 32, Pat became

the youngest vice-president Intel ever had. A bit later, he took over as the

chip giant’s first CTO. Overseeing the entire technology research and

development activity at Intel, Pat today works as the top visionary of the

digital world. Excerpts from an interview with Dataquest:

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You seem to be excited about the possibility of extending Moore’s Law

into other areas. How soon do you think Moore’s Law can be adopted?



In the communications area, particularly the wireless communications

segment, there is a lot of enthusiasm in applying Moore’s Law to build current

products in a better way. However, the concept has not picked up in the

application of those capabilities to new markets. We are working with some

companies to start applying things like sensor networks to new application areas

assuming that radios become free, ubiquitous and fully integrated. There are a

few challenges though. For instance, having built the antenna, how do you put it

into the laptop and other devices so that it does not interfere with the rest of

the circuitry? We also need to identify new market applications for these

capabilities. Industry participation is critical in expanding Moore’s Law.

Intel does not build products but building blocks. We are looking for companies

with systems, software applications and platforms that will complement our

innovations.

Your confidence in Silicon seems to be near total as you talk about it

driving the chip speed into tens of GHz in the next 20 years. Is there any other

compound that Intel is trying out for high-speed processors that uses terahertz

transistors?



My confidence in Silicon stems from the fact that it can be manufactured

easily. You can combine other materials into Silicon very effectively. Compounds

such as Gallium-Arsenide (GaAs), Silicon-Germanium (SiGe) and a few others are

very expensive. Besides, they are not scalable and cannot be manufactured. As a

result, GaAs has achieved the reputation of being ‘tomorrow’s technology for

ever!’ We have been talking about this compound for the last 15 years. It will

not go away. It is needed for some extremely high performance applications. The

other aspect is that because of the materials used inside Silicon, I now believe

that biological computers will never make any difference. However, I do think

that we might use biological materials and their characteristics in Silicon. The

concept of bio-enhanced Silicon may catch up in the future but Silicon will

remain the fundamental substance.

What are the limitations of Silicon?



Lithography and the power issue are the main limitations of Moore’s Law.

Power does not go away. We also need to engineer new technology. In fact, we

need to attack that aggressively.

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How interested is Intel in the Carbon nanotube technology?



We are quite interested in this one. The approach could be like that of

bio-enhanced Silicon, which would be very useful in the future. However, it will

be decades before mass production of products based on these technologies takes

place.

The next spurt in innovation in software applications will come through

Web services. With the DotNet environment, the Web services solutions, UDDI?



Universal Description, Discovery, and Integration- an XML-based registry for

businesses worldwide to list themselves on the Internet.) XML (Extensible Markup

Language) and other concepts reaching the first generation of maturity, we

expect high activity in these models.

On the PC front, Intel is working with its OEMs to consistently reduce the

form factor. On the other hand, notebooks are getting more and more powerful and

loaded with as many features as the PC. Moreover, the Tablet PC is coming this

year. Where’s the PC headed in light of all this?



The distinction between PCs and the mobile desktops is increasingly getting

blurred. In Japan for instance, big notebooks are used as desktops. They are

transported from one place to another probably once or twice during their

lifetime. They are mobile and yet not mobile. The desktops are shrinking in

their form factors. We are comfortable with that. We expect the line of

distinction to blur further in the future. However, there are some innovations

that will differentiate the desktops from the mobiles. Take for instance,

wireless applications. My vision of the mobile version of the wireless device is

what I call 111A.

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This means the device should weigh a pound, have a day’s battery life, be

an inch thick and always connected, anywhere.

And I should be able to seamlessly roam in the LAN or WAN environment.

Continuous innovation in the area of wireless applications will ensure that the

PC is connected to other devices in the home or office. At home, one could have

the PC island, the TV island and the music system island. The personal computer

can now become the server for the network that wirelessly connects all these

islands. Connectivity within the home will be the focus of the PC and component

industry over the next two years.

Talking of competition, what about AMD’s view that speed is not

everything to a processor?



We have never said that megahertz was the key to performance. We do two

things. We base on our marketing and industry perception of the hardcore

technical things that you can measure. The other thing we do is benchmarks.

Those things can be measured. This is how we think we can communicate to the

users and make further progress.

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You have been very secretive about the Banias chip for notebooks, expected

later this year...



No. Not as yet. Part of the reason why we are secretive is that we ourselves

have not seen the baby. All I can say is that things are looking good. We are

very optimistic about maintaining our schedules.

The P4 will touch 3 GHz and 533 MHz bus speed by end-2002. Are other PC

sub-systems keeping pace with processor development?



We have put in a lot of effort to deliver a balanced effort. As we move to

well above 3Ghz in the future, I/O system scalability will be a key issue and

that is the driving force of the PCI Express (3GIO) effort.

What is Intel’s take today on integrating more functionality into the

processor or the chipset, taking those functions away from additional systems or

plug-in cards? We already have ‘software modems’; Intel has graphics

chipsets, which do away with graphics cards. Now, with the Banias (new mobile

chip), the accompanying chipset will include 802.11 functionality. How far does

this go? Is this changing the processor/chipset role from ‘the heart of the PC’

to ‘almost the entire PC’, with other functionality in software? What is the

role of sub-systems vendors, such as graphics companies like Nvidia or others?



This is the continuing thrust of silicon innovation. The cycles of

innovation, standardization and integration continue. We see no end to this. In

the future, things like wireless communication, optical networking, video and

speech inputs, new models of storage and new types of outputs will continue to

provide the next elements of these cycles.

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McKinley is one of the biggest chips ever. While you keep pushing silicon

and keep up with Moore’s Law, is this the path? You have declining yields with
such large chips, and difficult manufacturing... Are such expensive, low-volume

chips worth it as against cheaper, more efficient chips deployed in

multiprocessing or massively parallel architectures?




Both the ‘big’ and the ‘parallel’ approaches add value and in many

cases are complimentary. On very large database machines, the very large caches

have very high performance value. Further, to enable higher degrees of MP, it is

essential to minimize bus traffic, which is exactly what the large caches

accomplish. Caches minimize latency and bus bandwidth. In this way, the on-chip

vs off-chip cache is a very good tradeoff and is a big factor in the improved

performance of McKinley. Finally, the yield is not an issue given Intel’s

tremendously strong process/manufacturing capabilities.

The McKinley has an on-chip 3MB level-three cache, a 256KB level-two cache

and a 32KB level-one cache. Is this complexity really necessary? Do you get a

big performance gain versus the Itanium’s external 4MB level-three cache? Are

you satisfied with the Itanium’s success in convincing CIOs that Intel chips

can power high-availability, high-performance enterprise systems? The

traditional RISC and UNIX systems, including Sun and IBM, seem to be doing just

fine...




Yes and no. It is still early and the overall program is later than we would
have hoped. However, we are gaining momentum, the design wins and the amount of

excitement for McKinley is high.

Manoj Chandran in Bangalore

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